Supercapacitor Sizing Calculator | UPS, E-STATCOM & AI Data-Centre ESS
Supercapacitor energy storage is deployed in three fundamentally different operating modes, each with a distinct sizing logic. An E-STATCOM must deliver full rated power during a grid fault lasting one to three seconds, then operate continuously at low power for frequency regulation — the pack must survive both the peak event and years of continuous cycling. A UPS holds charge at the bus voltage and discharges in a single pulse: sizing is determined by voltage and current limits during the event, and lifetime by the hold conditions between events. A data-centre or AI-compute buffer runs continuous high-rate charge–discharge cycles where cell temperature and long-term degradation are the binding constraints.
Most available tools size for one scenario at beginning-of-life cell parameters. This tool covers all three profiles in a single workflow and evaluates results at three IEC 62391 aging states — beginning, mid, and end of life (ESR ×1.5/×2.0; capacitance ×0.9/×0.8) — so the pack remains feasible as it ages. Auto-sizing finds the minimum cell count meeting energy, current, thermal, and calendar-life constraints simultaneously across all three states. Lifetime uses an Arrhenius temperature model with adjustable activation energy rather than a fixed rule of thumb, and the discharge ODE is integrated with RK4 using a log-weighted effective voltage over the trajectory — consistent with cell-level LTSpice simulation models.
Independent, product-specific sizing calibrated to your shortlisted cell or module using manufacturer data, against your duty profile and lifetime target — prepared as billable engineering work by Phasor Consult.
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01 — UPS / DC bus ride-through · 800 V
Industrial drive or data-centre UPS: 200 kW hold for 3 s. Cell-level, Ns = 295, Np = 4 (1180 cells). Pack operates below rated cell voltage — series-count derating is the primary lifetime lever. Temperature rise during a brief pulse is negligible; lifetime is dominated by hold voltage and coolant temperature.
Inputs
- Cell rated voltage
- 2.85 V
- Capacitance / ESR
- 3200 F · 0.25 mΩ
- L_ref (rated V, 65 °C)
- 1500 h
- DC bus voltage
- 800 V
- Ns / Np
- 295 / 4
- Coolant temperature
- 25 °C
- Min discharge voltage
- 50 % of bus
- Power · pulse time
- 200 kW · 3 s
- Target lifetime
- 10 yr
Results
- Total cells
- 1180
- Pack rated voltage
- 840.8 V
- Cell voltage at bus
- 2.71 V
- Energy stored (to 50 % bus)
- 10.4 MJ
- Energy used per pulse
- 0.6 MJ
- V_end after 3 s
- 782 V
- Peak bus current
- 256 A
- Temp rise (pulse)
- < 0.1 °C
- Lifetime BoL / MoL / EoL
- 11.2 / 11.2 / 11.2 yr ✓
02 — Constant load / AI-compute buffer · 800 V
Data-centre power buffer for AI workload transients: 50 kW continuous, 1 s full charge–discharge cycle. Cell-level, Ns = 300, Np = 1 (300 cells). Temperature rise under continuous cycling is moderate; EoL ESR increase raises cell temperature and reduces lifetime margin, making thermal assessment across aging states essential.
Inputs
- Cell rated voltage
- 2.85 V
- Capacitance / ESR
- 3200 F · 0.25 mΩ
- L_ref (rated V, 65 °C)
- 1500 h
- DC bus voltage
- 800 V
- Ns / Np
- 300 / 1
- Coolant temperature
- 25 °C
- Min discharge voltage
- 50 % of bus
- Power · cycle time
- 50 kW · 1 s
- Target lifetime
- 5 yr
Results
- Total cells
- 300
- Pack rated voltage
- 855.0 V
- Cell voltage at bus
- 2.67 V
- V_end per half-cycle
- 796 V
- Peak bus current
- 63 A
- Settled ΔT — BoL / MoL / EoL
- 4.9 / 7.3 / 9.8 °C
- T_cell — BoL / MoL / EoL
- 29.9 / 32.3 / 34.8 °C
- Lifetime BoL / MoL / EoL
- 9.2 / 7.9 / 6.4 yr ✓
03 — E-STATCOM · distributed storage · 1.5 kV DC bus per MMC cell (Nidec Silcovar-class)
Low-voltage building-block MMC: each submodule (“cell”) carries its own 1.5 kV DC link with a dedicated supercapacitor string, built from standard 1700 V-class IGBTs. Energy storage is distributed across all submodules rather than lumped on one bus. This example sizes one submodule for its share of duty — a ~100 MW / 10 MW system is built by replicating it across ~100 submodules per the converter's series-count and arm arrangement. Module-level supercap blocks; Ns = 17, Np = 2 per submodule (34 modules — 1224 cells each). Note: this low-voltage parallel-DC approach is not unique to Nidec — Mitsubishi's SVC-Diamond uses the same building-block philosophy.
Inputs (per submodule)
- Unit type
- Module (36 cells)
- Module capacitance / ESR
- 88.9 F · 9.5 mΩ
- Module R_th / C_th
- 0.14 °C/W · 36 000 J/°C
- L_ref (rated V, 65 °C)
- 1500 h
- DC bus voltage (per cell)
- 1500 V
- Ns / Np
- 17 / 2
- Coolant temperature
- 25 °C
- Fault power · pulse · cycles
- 1 MW · 1.25 s · 2
- Continuous power
- 100 kW
- Target lifetime
- 20 yr
Results (per submodule)
- Modules / cells
- 34 / 1224
- Pack rated voltage
- 1744.2 V
- Cell voltage at bus
- 2.45 V
- Fault energy (sequence)
- 5.0 MJ
- String energy (to 50 %)
- 8.8 MJ
- Peak cell-bus current (fault)
- 667 A
- ΔT fault / steady-state
- < 0.1 / ≈ 1.4 °C
- Lifetime BoL / MoL / EoL
- 43.4 / 42.6 / 41.7 yr ✓
04 — E-STATCOM · central storage · 40 kV DC bus, one ESS for all arms (Siemens / GE / Hitachi / Hyosung-class)
High-voltage central architecture: a single supercapacitor ESS on a common ~40 kV DC bus serves the whole converter — the arrangement used by Siemens SVC PLUS FS, GE, Hitachi Energy and Hyosung MMC-STATCOMs with bulk supercapacitor storage. One pack handles the entire power profile (fault boost plus continuous frequency regulation). Auto-sized at module level; Ns = 440, Np = 5 (2200 modules — 79 200 cells). The 40 kV rated voltage needs hundreds of modules in series, so a single string already provides large derating headroom; series count is then raised by the optimizer to clear the 20 yr lifetime target.
Inputs (whole system)
- Unit type
- Module (36 cells)
- Module capacitance / ESR
- 88.9 F · 9.5 mΩ
- Module R_th / C_th
- 0.14 °C/W · 36 000 J/°C
- L_ref (rated V, 65 °C)
- 1500 h
- DC bus voltage (central)
- 40 000 V
- Sizing
- Automatic
- Coolant temperature
- 25 °C
- Fault power · pulse · cycles
- 100 MW · 1.25 s · 2
- Continuous power
- 10 MW
- Target lifetime
- 20 yr
Results (whole system)
- Modules / total cells
- 2200 / 79 200
- Pack rated voltage
- 45 144 V
- Cell voltage at bus
- 2.53 V
- Fault energy (sequence)
- 500 MJ
- String energy (to 50 %)
- 606 MJ
- Peak bus current (fault)
- 2500 A
- ΔT fault / steady-state
- < 0.1 / ≈ 3.3 °C
- Lifetime BoL / MoL / EoL
- 26.0 / 24.8 / 23.4 yr ✓
| State | ESR factor | Capacitance factor |
|---|---|---|
| BoL — beginning of life | ×1.0 | ×1.0 |
| MoL — mid of life | ×1.5 | ×0.9 |
| EoL — end of life | ×2.0 | ×0.8 |
If your browser didn't open an email draft, copy the message below and send it to mykola@phasorconsult.eu (subject: Review my ESS sizing case).
Results are evaluated at three IEC 62391 aging states — BoL (new), MoL (ESR ×1.5 / C ×0.9), EoL (ESR ×2.0 / C ×0.8). Auto-sizing requires all three states to pass all gates. E-STATCOM: two-phase simulation — fault sequence (ncycles × 2 × pulse time, continuous operation at fault power) followed by frequency-regulation cycling (0.1 s full cycle, 0.05 s half-cycle); lifetime is computed from the continuous phase. UPS: one discharge pulse; lifetime from the bus hold voltage and coolant temperature. Constant load: continuous charge–discharge cycling; lifetime from settled cell temperature and log-weighted mean cell voltage. Lifetime model: Arrhenius temperature factor exp(Ea/kB × (1/T_cell − 1/T_ref)), T_ref = 65 °C; Ea default 0.7 eV (typical EDLC range 0.5–0.9 eV, Kreczanik 2014). Voltage factor: life doubles per V_half below rated (default 0.1 V). Discharge ODE integrated with RK4 (50 steps), ESR-compensated — bus receives the rated power while cells supply P + I²·ESR. Cells within a module are all in series.